AI Coding Meta

AI Coding Meta — independent reviews, comparisons, pricing and step-by-step guides on Aizhi.

  • Meta-Labeling

    Meta-Labeling

    Meta-labeling, also known as corrective AI, is a machine learning (ML) technique utilized in quantitative finance to enhance the performance of investment and trading strategies, developed in 2017 by Marcos López de Prado at Guggenheim Partners and Cornell University. The core idea is to separate the decision of trade direction (side) from the decision of trade sizing, addressing the inefficiencies of simultaneously learning both side and size predictions. The side decision involves forecasting market movements (long, short, neutral), while the size decision focuses on risk management and profitability. It serves as a secondary decision-making layer that evaluates the signals generated by a primary predictive model. By assessing the confidence and likely profitability of those signals, meta-labeling allows investors and algorithms to dynamically size positions and suppress false positives. == Motivation == Meta-labeling is designed to improve precision without sacrificing recall. As noted by López de Prado, attempting to model both the direction and the magnitude of a trade using a single algorithm can result in poor generalization. By separating these tasks, meta-labeling enables greater flexibility and robustness: Enhances control over capital allocation. Reduces overfitting by limiting model complexity. Allows the use of interpretability tools and tailored thresholds to manage risk. Enables dynamic trade suppression in unfavorable regimes. == Applications == Meta-labeling has been applied in a variety of financial ML contexts, including: Algorithmic trading: Filtering and sizing trades to reduce false positives. Portfolio optimization: Scaling exposure across multiple signals with differing confidence levels. Risk management: Dynamically disabling strategies in adverse market conditions. Model validation: Interpreting when and why a model may be underperforming due to regime shifts. == General architecture == Meta-labeling decouples two core components of systematic trading strategies: directional prediction and position sizing. The process involves training a primary model to generate trade signals (e.g., buy, sell, or hold) and then training a secondary model to determine whether each signal is likely to lead to a profitable trade. The second model outputs a probability that is interpreted as the confidence in the forecast, which can be used to adjust the position size or to filter out unreliable trades. Meta-labeling is typically implemented as a three-stage process: Primary model (M1): Predicts the direction or label of a financial outcome using features such as market prices, returns, or volatility indicators. A typical output is directional, e.g., Y ∈ {−1,0,1}, representing short, neutral, or long positions. Secondary model (M2): A binary classifier trained to predict whether the primary model's prediction will be profitable. The target variable is a binary meta-label F ∈ { 0 , 1 } {\displaystyle F\in \{0,1\}} . Inputs can include features used in the primary model, performance diagnostics, or market regime data. Position sizing algorithm (M3): Translates the output probability of the secondary model into a position size. Higher confidence scores result in larger allocations, while lower confidence leads to reduced or zero exposure. === Stage 1: Forecasting side === Primary model architecture Figure 1 Figure 1 presents the architecture of a primary model. It focuses on forecasting the side of the trade. Following the example, this model (M1) takes in input data – such as open-high-low-close data and determines the side of the position to take: a negative number is a short position, and positive number is a long position, the range is set between −1 and 1 (the closer it is to −1 or 1, the stronger the models conviction is). When training the model, the labels are −1 and 1, based on the direction of forward returns for some predefined investment horizon. The researcher may decide to apply a recall check (τ: "Tau") by setting a minimum threshold that the initial output needs to be to qualify of a short or long position (if the threshold is not met, no side forecast is predicted, leading to closing of any open positions), this leads to the primary model output which is one of three possible side forecasts: −1, 0, or 1. The primary model also generates evaluation data which can be used by the secondary model, to improve performance of size forecasts. Some examples of evaluation data include rolling accuracy, F1, recall, precision, and AUC scores. === Stage 2: Filtering out false positives === General meta-labeling architecture Figure 2 Next comes the phase of filtering out false positives, by applying a secondary machine learning model (M2), which is a binary classifier trained to determine if the trade will be profitable or not. The model takes as input four general groupings of data: General input data which is predictive of a false positive. For example the last 30 days rolling volatility of the underlying asset. Evaluation data. Market state and regime data, one may find that macro economic data or clustering the market into regimes may help as specific trading strategies are known to perform better in particular regimes. Example: momentum based strategies perform best in periods with low volatility and strong directional moves. Primary models initial input which is a value between −1 and 1. This highlights the strength of the primary models conviction. The output of the model is a value between −1 and 1 (if using a Tanh function) which will indicate the strength of the conviction that a short or long position is profitable, or it could simply be between 0 and 1 (using a sigmoid function) if one only wanted to know if it made money or not. This output allows filtering out trades that are likely to lead to losses. One could stop at this point or use the outputs of the secondary model as inputs to a position sizing algorithm (M3) which could further enhance strategy performance metrics by translating the output probability of the secondary model into a position size. Higher confidence scores result in larger allocations, while lower confidence leads to reduced or zero exposure. === Stage 3: Optimizing position sizes === ==== Position sizing methods (M3) ==== Various algorithms have been proposed for transforming predicted probabilities into trade sizes: All-or-nothing: Allocate 100% of capital if the probability exceeds a predefined threshold (e.g., 0.5); otherwise, do not trade. Model confidence: Use the probability score directly as the fraction of capital allocated. Linear scaling: Rescale the model's probabilities using min-max normalization based on the training data. Normal CDF (NCDF): Use a normal cumulative distribution function applied to a z-statistic derived from the predicted probability. Empirical CDF (ECDF): Rank probabilities based on their percentile in the training data to ensure relative allocation. Sigmoid Optimal Position Sizing (SOPS): Applies a smooth non-linear sigmoid transformation optimized to maximize risk-adjusted returns (Sharpe ratio). ==== Model calibration ==== Each machine learning algorithm used in meta-labeling tends to produce outputs with different characteristic distributions; for example, some are approximately normally distributed, whereas others exhibit a pronounced U-shape, concentrating probabilities near the extremes. Due to these varying distributions, simply summing the outputs of different models can inadvertently lead to uneven weighting of signals, biasing trade decisions. To address this, model calibration techniques are essential to adjust the predicted probabilities towards frequentist probabilities, ensuring that model outputs reflect true likelihoods more accurately. Two common calibration techniques are: Platt scaling (Sigmoid scaling): Suitable for correcting S-shaped calibration plots typically produced by models such as support vector machines (SVMs). Isotonic regression: Fits a non-decreasing step function to probabilities and is effective particularly with larger datasets, though it can sometimes lead to overfitting. Transforming predictions to frequentist probabilities is crucial as it provides probabilistic outputs that are directly interpretable as the actual likelihood of an event occurring. Such calibration significantly enhances the effectiveness of fixed position sizing methods, reducing maximum drawdowns and increasing risk-adjusted returns. However, calibration has less impact on position sizing methods that directly estimate parameters from the training data, such as ECDF and SOPS, suggesting that calibration is a critical step mainly for fixed methods that rely heavily on raw model outputs. =

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  • Content strategy

    Content strategy

    Content strategy guides the planning, development, and management of content. It is a recognized field in user experience design, and it also draws from adjacent disciplines such as information architecture, content management, business analysis, digital marketing, and technical communication. == Definitions == Content strategy has been described as planning for "the creation, publication, and governance of useful, usable content." It has also been called "a repeatable system that defines the entire editorial content development process for a website development project." In a 2007 article titled "Content Strategy: The Philosophy of Data," Rachel Lovinger describes the goal of content strategy as using "words and data to create unambiguous content that supports meaningful, interactive experiences." Here, she also provided the analogy that "content strategy is to copywriting as information architecture is to design." She encourages content strategists and collaborators to engage in early discussions about content meaning, models, and tools, to make sure strategy is integrated from the start rather than as an afterthought. The Content Strategy Alliance combines Kevin Nichols' definition with Kristina Halvorson's and defines content strategy as "getting the right content to the right user at the right time through strategic planning of content creation, delivery, and governance." == Practitioners == Content strategists are often familiar with a wide range of approaches, techniques, and tools. The perspectives that content strategists bring also depend heavily on their professional training and education. For instance, some specialize in "front-end strategy," which includes developing personas, journey mapping the user experience, aligning business strategy and user needs, developing a brand strategy, exploring different channels, and creating style guidelines and search engine optimization (SEO) guidelines. Others specialize in "back-end strategy," which includes creating content models, planning taxonomies and metadata, structuring content management systems, and building systems to support content reuse. Both roles involve addressing workflow and governance issues. Many organizations and individuals tend to confuse content strategists with editors. However, content strategy is "about more than just the written word," according to Washington State University associate professor Brett Atwood. For example, Atwood indicates that a practitioner needs to also "consider how content might be re-distributed and/or re-purposed in other channels of delivery." It has also been proposed that the content strategist performs the role of a curator. Just as a museum curator sifts through a collection of content and identifies key pieces that can be juxtaposed against each other to create meaning and spur excitement, a content strategist "must approach a business’s content as a medium that needs to be strategically selected and placed to engage the audience, convey a message, and inspire action."

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  • Distributed operating system

    Distributed operating system

    A distributed operating system is system software over a collection of independent software, networked, communicating, and physically separate computational nodes. They handle jobs which are serviced by multiple CPUs. Each individual node holds a specific software subset of the global aggregate operating system. Each subset is a composite of two distinct service provisioners. The first is a ubiquitous minimal kernel, or microkernel, that directly controls that node's hardware. Second is a higher-level collection of system management components that coordinate the node's individual and collaborative activities. These components abstract microkernel functions and support user applications. The microkernel and the management components collection work together. They support the system's goal of integrating multiple resources and processing functionality into an efficient and stable system. This seamless integration of individual nodes into a global system is referred to as transparency, or single system image; describing the illusion provided to users of the global system's appearance as a single computational entity. == Description == A distributed OS provides the essential services and functionality required of an OS but adds attributes and particular configurations to allow it to support additional requirements such as increased scale and availability. To a user, a distributed OS works in a manner similar to a single-node, monolithic operating system. That is, although it consists of multiple nodes, it appears to users and applications as a single-node. Separating minimal system-level functionality from additional user-level modular services provides a "separation of mechanism and policy". Mechanism and policy can be simply interpreted as "what something is done" versus "how something is done," respectively. This separation increases flexibility and scalability. == Overview == === The kernel === At each locale (typically a node), the kernel provides a minimally complete set of node-level utilities necessary for operating a node's underlying hardware and resources. These mechanisms include allocation, management, and disposition of a node's resources, processes, communication, and input/output management support functions. Within the kernel, the communications sub-system is of foremost importance for a distributed OS. In a distributed OS, the kernel often supports a minimal set of functions, including low-level address space management, thread management, and inter-process communication (IPC). A kernel of this design is referred to as a microkernel. Its modular nature enhances reliability and security, essential features for a distributed OS. === System management === System management components are software processes that define the node's policies. These components are the part of the OS outside the kernel. These components provide higher-level communication, process and resource management, reliability, performance and security. The components match the functions of a single-entity system, adding the transparency required in a distributed environment. The distributed nature of the OS requires additional services to support a node's responsibilities to the global system. In addition, the system management components accept the "defensive" responsibilities of reliability, availability, and persistence. These responsibilities can conflict with each other. A consistent approach, balanced perspective, and a deep understanding of the overall system can assist in identifying diminishing returns. Separation of policy and mechanism mitigates such conflicts. === Working together as an operating system === The architecture and design of a distributed operating system must realize both individual node and global system goals. Architecture and design must be approached in a manner consistent with separating policy and mechanism. In doing so, a distributed operating system attempts to provide an efficient and reliable distributed computing framework allowing for an absolute minimal user awareness of the underlying command and control efforts. The multi-level collaboration between a kernel and the system management components, and in turn between the distinct nodes in a distributed operating system is the functional challenge of the distributed operating system. This is the point in the system that must maintain a perfect harmony of purpose, and simultaneously maintain a complete disconnect of intent from implementation. This challenge is the distributed operating system's opportunity to produce the foundation and framework for a reliable, efficient, available, robust, extensible, and scalable system. However, this opportunity comes at a very high cost in complexity. === The price of complexity === In a distributed operating system, the exceptional degree of inherent complexity could easily render the entire system an anathema to any user. As such, the logical price of realizing a distributed operation system must be calculated in terms of overcoming vast amounts of complexity in many areas, and on many levels. This calculation includes the depth, breadth, and range of design investment and architectural planning required in achieving even the most modest implementation. These design and development considerations are critical and unforgiving. For instance, a deep understanding of a distributed operating system's overall architectural and design detail is required at an exceptionally early point. An exhausting array of design considerations are inherent in the development of a distributed operating system. Each of these design considerations can potentially affect many of the others to a significant degree. This leads to a massive effort in balanced approach, in terms of the individual design considerations, and many of their permutations. As an aid in this effort, most rely on documented experience and research in distributed computing power. == History == Research and experimentation efforts began in earnest in the 1970s and continued through the 1990s, with focused interest peaking in the late 1980s. A number of distributed operating systems were introduced during this period; however, very few of these implementations achieved even modest commercial success. Fundamental and pioneering implementations of primitive distributed operating system component concepts date to the early 1950s. Some of these individual steps were not focused directly on distributed computing, and at the time, many may not have realized their important impact. These pioneering efforts laid important groundwork, and inspired continued research in areas related to distributed computing. In the mid-1970s, research produced important advances in distributed computing. These breakthroughs provided a solid, stable foundation for efforts that continued through the 1990s. The accelerating proliferation of multi-processor and multi-core processor systems research led to a resurgence of the distributed OS concept. === The DYSEAC === One of the first efforts was the DYSEAC, a general-purpose synchronous computer. In one of the earliest publications of the Association for Computing Machinery, in April 1954, a researcher at the National Bureau of Standards – now the National Institute of Standards and Technology (NIST) – presented a detailed specification of the DYSEAC. The introduction focused upon the requirements of the intended applications, including flexible communications, but also mentioned other computers: Finally, the external devices could even include other full-scale computers employing the same digital language as the DYSEAC. For example, the SEAC or other computers similar to it could be harnessed to the DYSEAC and by use of coordinated programs could be made to work together in mutual cooperation on a common task… Consequently[,] the computer can be used to coordinate the diverse activities of all the external devices into an effective ensemble operation. The specification discussed the architecture of multi-computer systems, preferring peer-to-peer rather than master-slave. Each member of such an interconnected group of separate computers is free at any time to initiate and dispatch special control orders to any of its partners in the system. As a consequence, the supervisory control over the common task may initially be loosely distributed throughout the system and then temporarily concentrated in one computer, or even passed rapidly from one machine to the other as the need arises. …the various interruption facilities which have been described are based on mutual cooperation between the computer and the external devices subsidiary to it, and do not reflect merely a simple master-slave relationship. This is one of the earliest examples of a computer with distributed control. The Dept. of the Army reports certified it reliable and that it passed all acceptance tests in April 1954. It was completed and delivered on time, in May 1954. This was a "portable comput

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  • X2 transceiver

    X2 transceiver

    The X2 transceiver format is a 10 gigabit per second modular fiber optic interface intended for use in routers, switches and optical transport platforms. It is an early generation 10 gigabit interface related to the similar XENPAK and XPAK formats. X2 may be used with 10 Gigabit Ethernet or OC-192/STM-64 speed SDH/SONET equipment. X2 modules are smaller and consume less power than first-generation XENPAK modules, but larger and consume more energy than the newer XFP transceiver standard and SFP+ standards. As of 2016 this format is relatively uncommon and has been replaced by 10 Gbit/s SFP+ in most new equipment.

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  • Circle Hough Transform

    Circle Hough Transform

    The circle Hough Transform (CHT) is a basic feature extraction technique used in digital image processing for detecting circles in imperfect images. The circle candidates are produced by “voting” in the Hough parameter space and then selecting local maxima in an accumulator matrix. It is a specialization of the Hough transform. == Theory == In a two-dimensional space, a circle can be described by: ( x − a ) 2 + ( y − b ) 2 = r 2 ( 1 ) {\displaystyle \left(x-a\right)^{2}+\left(y-b\right)^{2}=r^{2}\ \ \ \ \ (1)} where (a,b) is the center of the circle, and r is the radius. If a 2D point (x,y) is fixed, then the parameters can be found according to (1). The parameter space would be three dimensional, (a, b, r). And all the parameters that satisfy (x, y) would lie on the surface of an inverted right-angled cone whose apex is at (x, y, 0). In the 3D space, the circle parameters can be identified by the intersection of many conic surfaces that are defined by points on the 2D circle. This process can be divided into two stages. The first stage is fixing radius then find the optimal center of circles in a 2D parameter space. The second stage is to find the optimal radius in a one dimensional parameter space. === Find parameters with known radius R === If the radius is fixed, then the parameter space would be reduced to 2D (the position of the circle center). For each point (x, y) on the original circle, it can define a circle centered at (x, y) with radius R according to (1). The intersection point of all such circles in the parameter space would be corresponding to the center point of the original circle. Consider 4 points on a circle in the original image (left). The circle Hough transform is shown in the right. Note that the radius is assumed to be known. For each (x,y) of the four points (white points) in the original image, it can define a circle in the Hough parameter space centered at (x, y) with radius r. An accumulator matrix is used for tracking the intersection point. In the parameter space, the voting number of those points that have a newly defined circle passing through them would be increased by one for every circle. Then the local maxima point (the red point in the center in the right figure) can be found. The position (a, b) of the maxima would be the center of the original circle. === Multiple circles with known radius R === Multiple circles with same radius can be found with the same technique. Note that, in the accumulator matrix (right fig), there would be at least 3 local maxima points. === Accumulator matrix and voting === In practice, an accumulator matrix is introduced to find the intersection point in the parameter space. First, we need to divide the parameter space into “buckets” using a grid and produce an accumulator matrix according to the grid. The element in the accumulator matrix denotes the number of “circles” in the parameter space that are passing through the corresponding grid cell in the parameter space. The number is also called “voting number”. Initially, every element in the matrix is zeros. Then for each “edge” point in the original space, we can formulate a circle in the parameter space and increase the voting number of the grid cell which the circle passes through. This process is called “voting”. After voting, we can find local maxima in the accumulator matrix. The positions of the local maxima are corresponding to the circle centers in the original space. === Find circle parameter with unknown radius === Since the parameter space is 3D, the accumulator matrix would be 3D, too. We can iterate through possible radii; for each radius, we use the previous technique. Finally, find the local maxima in the 3D accumulator matrix. Accumulator array should be A[x,y,r] in the 3D space. Voting should be for each pixels, radius and theta A[x,y,r] += 1 The algorithm : For each A[a,b,r] = 0; Process the filtering algorithm on image Gaussian Blurring, convert the image to grayscale ( grayScaling), make Canny operator, The Canny operator gives the edges on image. Vote on all possible circles in accumulator. The local maximum voted circles of Accumulator A gives the circle Hough space. The maximum voted circle of Accumulator gives the circle. The Incrementing for Best Candidate : For each A[a,b,r] = 0; // fill with zeroes initially, instantiate 3D matrix For each cell(x,y) For each theta t = 0 to 360 // the possible theta 0 to 360 b = y – r sin(t PI / 180); //polar coordinate for center (convert to radians) a = x – r cos(t PI / 180); //polar coordinate for center (convert to radians) A[a,b,r] +=1; //voting end end == Examples == === Find circles in a shoe-print === The original picture (right) is first turned into a binary image (left) using a threshold and Gaussian filter. Then edges (mid) are found from it using canny edge detection. After this, all the edge points are used by the Circle Hough Transform to find underlying circle structure. == Limitations == Since the parameter space of the CHT is three dimensional, it may require lots of storage and computation. Choosing a bigger grid size can ameliorate this problem. However, choosing an appropriate grid size is difficult. Since too coarse a grid can lead to large values of the vote being obtained falsely because many quite different structures correspond to a single bucket. Too fine a grid can lead to structures not being found because votes resulting from tokens that are not exactly aligned end up in different buckets, and no bucket has a large vote. Also, the CHT is not very robust to noise. == Extensions == === Adaptive Hough Transform === J. Illingworth and J. Kittler introduced this method for implementing Hough Transform efficiently. The AHT uses a small accumulator array and the idea of a flexible iterative "coarse to fine" accumulation and search strategy to identify significant peaks in the Hough parameter spaces. This method is substantially superior to the standard Hough Transform implementation in both storage and computational requirements. == Application == === People Counting === Since the head would be similar to a circle in an image, CHT can be used for detecting heads in a picture, so as to count the number of persons in the image. === Brain Aneurysm Detection === Modified Hough Circle Transform (MHCT) is used on the image extracted from Digital Subtraction Angiogram (DSA) to detect and classify aneurysms type. == Implementation code == Circle Detection via Standard Hough Transform, by Amin Sarafraz, Mathworks (File Exchange) Hough Circle Transform, OpenCV-Python Tutorials (archived version on archive.org)

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  • European Information Technology Observatory

    European Information Technology Observatory

    The European Information Technology Observatory (EITO) gathers information on European and global markets for information technology, telecommunications and consumer electronics. The EITO is managed by Bitkom Research GmbH, a wholly owned subsidiary of BITKOM, the German Association for Information Technology, Telecommunications and New Media. EITO is sponsored by Deutsche Telekom, KPMG and Telecom Italia. The research activities of the EITO Task Force are supported by the European Commission and the OECD. The EITO exists thanks to an initiative of Enore Deotto from MIlan and the support of Luis-Alberto Petit Herrera (Madrid), Jörg Schomburg (Hanover) and Günther Möller (Frankfurt). Between 1993 and 2007, the market reports were published as printed annual reports ("EITO yearbook"). Since 2008 the market reports are available in electronic version and can be purchased on the EITO online portal. Currently, the ICT market reports are divided in following categories: International Reports International Reports include ICT market information of all EITO countries and all market segments or only specific segments. The newest ICT Market Report 2013/14, published in October 2013, includes market data of 36 countries: 28 European markets, BRIC countries, Japan, Turkey and the US as well as a deep analysis of ICT market developments in 9 European countries. The detailed market data and forecasts are available for the period 2010–2014. Country Reports This category includes EITO reports on a single country's ICT market. The Country ICT Market Reports are published biannually for France, Germany, Italy, Spain and the United Kingdom. Thematic Reports Thematic studies focusing on a specific topic. Customized Reports Market Reports made upon order.

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  • Digital signal

    Digital signal

    A digital signal is a signal that represents data as a sequence of discrete values; at any given time it can only take on, at most, one of a finite number of values. This contrasts with an analog signal, which represents continuous values; at any given time it represents a real number within an infinite set of values. Simple digital signals represent information in discrete bands of levels. All levels within a band of values represent the same information state. In most digital circuits, the signal can have two possible valid values; this is called a binary signal or logic signal. They are represented by two voltage bands: one near a reference value (typically termed as ground or zero volts), and the other a value near the supply voltage. These correspond to the two values zero and one (or false and true) of the Boolean domain, so at any given time a binary signal represents one binary digit (bit). Because of this discretization, relatively small changes to the signal levels do not leave the discrete envelope, and as a result are ignored by signal state sensing circuitry. As a result, digital signals have noise immunity; electronic noise, provided it is not too great, will not affect digital circuits, whereas noise always degrades the operation of analog signals to some degree. Digital signals having more than two states are occasionally used; circuitry using such signals is called multivalued logic. For example, signals that can assume three possible states are called three-valued logic. In a digital signal, the physical quantity representing the information may be a variable electric current or voltage, the intensity, phase or polarization of an optical or other electromagnetic field, acoustic pressure, the magnetization of a magnetic storage media, etcetera. Digital signals are used in all digital electronics, notably computing equipment and data transmission. == Definitions == The term digital signal has related definitions in different contexts. === In digital electronics === In digital electronics, a digital signal is a pulse amplitude modulated signal, i.e., a sequence of fixed-width electrical pulses or light pulses, each occupying one of a discrete number of levels of amplitude. A special case is a logic signal or a binary signal, which varies between a low and a high signal level. The pulse trains in digital circuits are typically generated by metal–oxide–semiconductor field-effect transistor (MOSFET) devices, due to their rapid on–off electronic switching speed and large-scale integration (LSI) capability. In contrast, bipolar junction transistors more slowly generate signals resembling sine waves. === In signal processing === In digital signal processing, a digital signal is a representation of a physical signal that is sampled and quantized. A digital signal is an abstraction that is discrete in time and amplitude. The signal's value only exists at regular time intervals, since only the values of the corresponding physical signal at those sampled moments are significant for further digital processing. The digital signal is a sequence of codes drawn from a finite set of values. The digital signal may be stored, processed or transmitted physically as a pulse-code modulation (PCM) signal. === In communications === In digital communications, a digital signal is a continuous-time physical signal, alternating between a discrete number of waveforms, representing a bitstream. The shape of the waveform depends on the transmission scheme, which may be either a line coding scheme allowing baseband transmission; or a digital modulation scheme, allowing passband transmission over long wires or over a limited radio frequency band. Such a carrier-modulated sine wave is considered a digital signal in literature on digital communications and data transmission, but considered as a bit stream converted to an analog signal in specific cases where the signal will be carried over a system meant for analog communication, such as an analog telephone line. In communications, sources of interference are usually present, and noise is frequently a significant problem. The effects of interference are typically minimized by filtering off interfering signals as much as possible and by using data redundancy. The main advantages of digital signals for communications are often considered to be noise immunity, and the ability, in many cases such as with audio and video data, to use data compression to greatly decrease the bandwidth that is required on the communication media. == Logic voltage levels == A waveform that switches representing the two states of a Boolean value (0 and 1, or low and high, or false and true) is referred to as a digital signal or logic signal or binary signal when it is interpreted in terms of only two possible digits. The two states are usually represented by some measurement of an electrical property: Voltage is the most common, but current is used in some logic families. Two ranges of voltages are typically defined for each logic family, which are frequently not directly adjacent. The signal is low when in the low range and high when in the high range, and in between the two ranges the behavior can vary between different types of gates. The clock signal is a special digital signal that is used to synchronize many digital circuits. The image shown can be considered the waveform of a clock signal. Logic changes are triggered either by the rising edge or the falling edge. The rising edge is the transition from a low voltage (level 1 in the diagram) to a high voltage (level 2). The falling edge is the transition from a high voltage to a low one. Although in a highly simplified and idealized model of a digital circuit, we may wish for these transitions to occur instantaneously, no real-world circuit is purely resistive, and therefore no circuit can instantly change voltage levels. This means that during a short, finite transition time, the output may not properly reflect the input, and will not correspond to either a logically high or low voltage. == Modulation == To create a digital signal, a signal must be modulated with a control signal to produce it. The simplest modulation, a type of unipolar encoding, is simply to switch on and off a DC signal so that high voltages represent a '1' and low voltages are '0'. In digital radio schemes, one or more carrier waves are amplitude, frequency or phase modulated by the control signal to produce a digital signal suitable for transmission. Asymmetric Digital Subscriber Line (ADSL) over telephone wires, does not primarily use binary logic; the digital signals for individual carriers are modulated with different-valued logics, depending on the Shannon capacity of the individual channel. == Clocking == Digital signals may be sampled by a clock signal at regular intervals by passing the signal through a flip-flop. When this is done, the input is measured at the clock edge and the signal from that time. The signal is then held steady until the next clock. This process is the basis of synchronous logic. Asynchronous logic also exists, which uses no single clock, and generally operates more quickly, and may use less power, but is significantly harder to design.

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  • Zero-overhead looping

    Zero-overhead looping

    In computer architecture, zero-overhead looping is a hardware feature found in some processors that enables loops to execute without the performance cost of traditional loop control instructions. Instead of software managing loop iterations, the processor's hardware handles repetition automatically, saving clock cycles and improving efficiency. This technique is commonly employed in digital signal processors (DSPs) and certain complex instruction set computer (CISC) architectures. == Background == In many instruction sets, a loop must be implemented by using instructions to increment or decrement a counter, check whether the end of the loop has been reached, and if not jump to the beginning of the loop so it can be repeated. Although this typically only represents around 3–16 bytes of space for each loop, even that small amount could be significant depending on the size of the CPU caches. More significant is that those instructions each take time to execute, time which is not spent doing useful work. The overhead of such a loop is apparent compared to a completely unrolled loop, in which the body of the loop is duplicated exactly as many times as it will execute. In that case, no space or execution time is wasted on instructions to repeat the body of the loop. However, the duplication caused by loop unrolling can significantly increase code size, and the larger size can even impact execution time due to cache misses. (For this reason, it's common to only partially unroll loops, such as transforming it into a loop which performs the work of four iterations in one step before repeating. This balances the advantages of unrolling with the overhead of repeating the loop.) Moreover, completely unrolling a loop is only possible for a limited number of loops: those whose number of iterations is known at compile time. For example, the following C code could be compiled and optimized into the following x86 assembly code: == Implementation == Processors with zero-overhead looping have machine instructions and registers to automatically repeat one or more instructions. Depending on the instructions available, these may only be suitable for count-controlled loops ("for loops") in which the number of iterations can be calculated in advance, or only for condition-controlled loops ("while loops") such as operations on null-terminated strings. === Examples === ==== PIC ==== In the PIC instruction set, the REPEAT and DO instructions implement zero-overhead loops. REPEAT only repeats a single instruction, while DO repeats a specified number of following instructions. ==== Blackfin ==== Blackfin offers two zero-overhead loops. The loops can be nested; if both hardware loops are configured with the same "loop end" address, loop 1 will behave as the inner loop and repeat, and loop 0 will behave as the outer loop and repeat only if loop 1 would not repeat. Loops are controlled using the LTx and LBx registers (x either 0 to 1) to set the top and bottom of the loop — that is, the first and last instructions to be executed, which can be the same for a loop with only one instruction — and LCx for the loop count. The loop repeats if LCx is nonzero at the end of the loop, in which case LCx is decremented. The loop registers can be set manually, but this would typically consume 6 bytes to load the registers, and 8–16 bytes to set up the values to be loaded. More common is to use the loop setup instruction (represented in assembly as either LOOP with pseudo-instruction LOOP_BEGIN and LOOP_END, or in a single line as LSETUP), which optionally initializes LCx and sets LTx and LBx to the desired values. This only requires 4–6 bytes, but can only set LTx and LBx within a limited range relative to where the loop setup instruction is located. ==== x86 ==== The x86 assembly language REP prefixes implement zero-overhead loops for a few instructions (namely MOVS/STOS/CMPS/LODS/SCAS). Depending on the prefix and the instruction, the instruction will be repeated a number of times with (E)CX holding the repeat count, or until a match (or non-match) is found with AL/AX/EAX or with DS:[(E)SI]. This can be used to implement some types of searches and operations on null-terminated strings.

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  • Quantum natural language processing

    Quantum natural language processing

    Quantum natural language processing (QNLP) is the application of quantum computing to natural language processing (NLP). It computes word embeddings as parameterised quantum circuits that can solve NLP tasks faster than any classical computer. It is inspired by categorical quantum mechanics and the DisCoCat framework, making use of string diagrams to translate from grammatical structure to quantum processes. == Theory == The first quantum algorithm for natural language processing used the DisCoCat framework and Grover's algorithm to show a quadratic quantum speedup for a text classification task. It was later shown that quantum language processing is BQP-Complete, i.e. quantum language models are more expressive than their classical counterpart, unless quantum mechanics can be efficiently simulated by classical computers. These two theoretical results assume fault-tolerant quantum computation and a QRAM, i.e. an efficient way to load classical data on a quantum computer. Thus, they are not applicable to the noisy intermediate-scale quantum (NISQ) computers available today. == Experiments == The algorithm of Zeng and Coecke was adapted to the constraints of NISQ computers and implemented on IBM quantum computers to solve binary classification tasks. Instead of loading classical word vectors onto a quantum memory, the word vectors are computed directly as the parameters of quantum circuits. These parameters are optimised using methods from quantum machine learning to solve data-driven tasks such as question answering, machine translation and even algorithmic music composition.

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  • Optical recording

    Optical recording

    The history of optical recording can be divided into a few number of distinct major contributions. The pioneers of optical recording worked mostly independently, and their solutions to the many technical challenges have very distinctive features, such as reflective disc (Compaan and Kramer) transparent disc (Gregg) floppy disc (Russell) rigid disc (Compaan and Kramer) focused laser beam for read-out through transparent substrate (Compaan and Kramer). == Gregg 1958 == Laserdisc technology, using a transparent disc, was invented by David Paul Gregg in 1958 (and patented in 1970 and 1990). By 1969 Philips had developed a videodisc in reflective mode, which has great advantages over the transparent mode. MCA and Philips decided to join their efforts. They first publicly demonstrated the videodisc in 1972. Laserdisc was first available on the market, in Atlanta, on December 15, 1978, two years after the VHS VCR and four years before the CD, which is based on Laserdisc technology. Philips produced the players and MCA produced the discs. The Philips/MCA cooperation was not successful, and discontinued after a few years. Several of the scientists responsible for the early research (John Winslow, Richard Wilkinson and Ray Dakin) founded Optical Disc Corporation (now ODC Nimbus). == Russell 1965 == While working at Pacific Northwest National Laboratory, James Russell invented an optical storage system for digital audio and video, patenting the concept in 1970. The earliest patents by Russell, US 3,501,586, and 3,795,902 were filed in 1966, and 1969. respectively. He built prototypes, and the first was operating in 1973. Russell had found a way to record digital information onto a photosensitive plate in tiny dark spots, each spot one micrometre from centre to centre, with a laser that wrote the binary patterns. Russell's first optical disc was distinctly different from the eventual compact disc product: the disc in the player was not read by laser light. A key characteristic of Russell's invention is that a laser is not used for the reading the disc, instead the entire disc or oblong sheet to be read is illuminated by a large playback light source at the back of the transparent foil. As a result, the information density is relatively low. By 1985, Russell held over 25 patents to various technologies related to optical recording and playback. Russell's intellectual property was purchased by Optical Recording Corporation (ORC) in Toronto in 1985, and this firm notified a number of CD manufacturers that their CD technology was based on patents held by ORC. In 1987, ORC signed an agreement with Sony whereby Sony paid for licensing of the technology. Further licenses followed from Philips and others. Warner Communications did not sign, and was sued by ORC. In 1992, the large CD manufacturer, now called Time Warner, was ordered to pay ORC US$30 million in patent violations. In the 1970 patent, the spot diameter was around 10 micrometres. Thus, the areal information density was around a factor hundred less than that of the CD as later developed. Russell continued to refine the concept throughout the 1970s. Philips and Sony, however, were able to put far greater resources into the parallel development of the concept, arriving at a smaller and more sophisticated product in just a few years. Russell's various partners and ventures failed to produce a single consumer product. == Korpel 1968 == Adrianus Korpel worked for the Zenith Electronics Corporation, when he developed very early optical videodisc systems, including holographic storage. == Kramer and Compaan 1969 == The Philips development of the videodisc technology began in 1969 with efforts by Dutch physicists Klaas Compaan and Piet Kramer to record video images in holographic form on disc. Their prototype Laserdisc shown in 1972 used a laser beam in reflective mode to read a track of pits using an FM video signal. Together with MCA, Philips brought the optical videodisk to market in 1978. The cooperation between Philips and MCA did not last long, and discontinued after a few years. == Immink and Doi 1979 == The Compact Disc (CD), which is based on MCA/Philips Laserdisc technology, was developed by a taskforce of Sony and Philips in 1979–1980. Toshi Doi and Kees Schouhamer Immink created the digital technologies that turned the analog Laserdisc into a high-density low-cost digital audio disc. The CD, available on the market since October 1982, remains the standard physical medium for sale of commercial audio recordings Standard CDs have a diameter of 120 mm and can hold up to 80 minutes of audio (700 MB of data). The Mini CD has various diameters ranging from 60 to 80 mm; they are sometimes used for CD singles or device drivers, storing up to 24 minutes of audio. The technology was later adapted and expanded to include data storage CD-ROM, write-once audio and data storage CD-R, rewritable media CD-RW, Super Audio CD (SACD), Video Compact Discs (VCD), Super Video Compact Discs (SVCD), PhotoCD, PictureCD, CD-i, and Enhanced CD. CD-ROMs and CD-Rs remain widely used technologies in the computer industry. The CD and its extensions have been extremely successful: in 2004, worldwide sales of CD audio, CD-ROM, and CD-R reached about 30 billion discs. By 2007, 200 billion CDs had been sold worldwide.

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  • Rider Spoke

    Rider Spoke

    Rider Spoke developed by Blast Theory in collaboration with the Mixed Reality Lab was first staged at the Barbican, London in October 2007. Created for cyclists, it combines elements of theatre, performance, game play and state of the art technology. Rider Spoke was built in the IPerG project on the EQUIP architecture. Rider Spoke has since been presented in Athens (2008), Brighton (2008), Budapest (2008), Sydney (2009, Adelaide (2009) and Liverpool (2010).

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  • ISO/IEC 11801

    ISO/IEC 11801

    International standard ISO/IEC 11801 Information technology — Generic cabling for customer premises specifies general-purpose telecommunication cabling systems (structured cabling) that are suitable for a wide range of applications (analog and ISDN telephony, various data communication standards, building control systems, factory automation). It is published by ISO/IEC JTC 1/SC 25/WG 3 of the International Organization for Standardization (ISO) and the International Electrotechnical Commission (IEC). It covers both balanced copper cabling and optical fibre cabling. The standard was designed for use within commercial premises that may consist of either a single building or of multiple buildings on a campus. It was optimized for premises that span up to 3 km, up to 1 km2 office space, with between 50 and 50,000 persons, but can also be applied for installations outside this range. A major revision was released in November 2017, unifying requirements for commercial, home and industrial networks. == Classes and categories == The standard defines several link/channel classes and cabling categories of twisted-pair copper interconnects, which differ in the maximum frequency for which a certain channel performance is required: Class A: Up to 100 kHz using Category 1 cable and connectors Class B: Up to 1 MHz using Category 2 cable and connectors Class C: Up to 16 MHz using Category 3 cable and connectors Class D: Up to 100 MHz using Category 5e cable and connectors Class E: Up to 250 MHz using Category 6 cable and connectors Class EA: Up to 500 MHz using category 6A cable and connectors (Amendments 1 and 2 to ISO/IEC 11801, 2nd Ed.) Class F: Up to 600 MHz using Category 7 cable and connectors Class FA: Up to 1 GHz (1000 MHz) using Category 7A cable and connectors (Amendments 1 and 2 to ISO/IEC 11801, 2nd Ed.) Class BCT-B: Up to 1 GHz (1000 MHz) using with coaxial cabling for BCT applications. (ISO/IEC 11801-1, Edition 1.0 2017-11) Class I: Up to 2 GHz (2000 MHz) using Category 8.1 cable and connectors (ISO/IEC 11801-1, Edition 1.0 2017-11) Class II: Up to 2 GHz (2000 MHz) using Category 8.2 cable and connectors (ISO/IEC 11801-1, Edition 1.0 2017-11) The standard link impedance is 100 Ω. (The older 1995 version of the standard also permitted 120 Ω and 150 Ω in Classes A−C, but this was removed from the 2002 edition.) The standard defines several classes of optical fiber interconnect: OM1: Multimode, 62.5 μm core; minimum modal bandwidth of 200 MHz·km at 850 nm OM2: Multimode, 50 μm core; minimum modal bandwidth of 500 MHz·km at 850 nm OM3: Multimode, 50 μm core; minimum modal bandwidth of 2000 MHz·km at 850 nm OM4: Multimode, 50 μm core; minimum modal bandwidth of 4700 MHz·km at 850 nm OM5: Multimode, 50 μm core; minimum modal bandwidth of 4700 MHz·km at 850 nm and 2470 MHz·km at 953 nm OS1: Single-mode, maximum attenuation 1 dB/km at 1310 and 1550 nm OS1a: Single-mode, maximum attenuation 1 dB/km at 1310, 1383, and 1550 nm OS2: Single-mode, maximum attenuation 0.4 dB/km at 1310, 1383, and 1550 nm Grandfathered === OM5 === OM5 fiber is designed for wideband applications using SWDM multiplexing of 4–16 carriers (40G=4λ×10G, 100G=4λ×25G, 400G=4×4λ×25G) in the 850–953 nm range. === Category 7 === Class F channel and Category 7 cable are backward compatible with Class D/Category 5e and Class E/Category 6. Class F features even stricter specifications for crosstalk and system noise than Class E. To achieve this, shielding was added for individual wire pairs and the cable as a whole. Unshielded cables rely on the quality of the twists to protect from EMI. This involves a tight twist and carefully controlled design. Cables with individual shielding per pair such as Category 7 rely mostly on the shield and therefore have pairs with longer twists. The Category 7 cable standard was ratified in 2002, and primarily introduced to support 10 gigabit Ethernet over 100 m of copper cabling. Like the earlier standards, it contains four twisted copper wire pairs rated for transmission frequencies of up to 600 MHz. However, in 2006, Category 6A was ratified for Ethernet to allow 10 Gbit/s while still using the conventional 8P8C connector. Care is required to avoid signal degradation by mixing cable and connectors not designed for that use, however similar. Most manufacturers of active equipment and network cards have chosen to support the 8P8C for their 10 gigabit Ethernet products on copper and not GG45, ARJ45, or TERA connectors as Class F would have originally called for. Therefore, the Category 6 specification was revised to Category 6A to permit this use; products therefore require a Class EA channel (ie, Cat 6A). As of 2019, some equipment has been introduced which has connectors supporting the Class F (Category 7) channel. Note, however, that Category 7 is not recognized by the TIA/EIA. === Category 7A === Class FA (Class F Augmented) channels and Category 7A cables, introduced by ISO 11801 Edition 2 Amendment 2 (2010), are defined at frequencies up to 1000 MHz. The intent of the Class FA was to possibly support the future 40 gigabit Ethernet: 40GBASE-T. Simulation results have shown that 40 gigabit Ethernet may be possible at 50 meters and 100 gigabit Ethernet at 15 meters. In 2007, researchers at Pennsylvania State University predicted that either 32 nm or 22 nm circuits would allow for 100 gigabit Ethernet at 100 meters. However, in 2016, the IEEE 802.3bq working group ratified the amendment 3 which defines 25GBASE-T and 40GBASE-T on Category 8 cabling specified to 2000 MHz. The Class FA therefore does not support 40G Ethernet. As of 2025, there is no equipment that has connectors supporting the Class FA (Category 7A) channel. Category 7A is not recognized in TIA/EIA. === Category 8 === Category 8 was ratified by the TR43 working group under ANSI/TIA 568-C.2-1. It is defined up to 2000 MHz and only for distances up to 30 m or 36 m, depending on the patch cords used. ISO/IEC JTC 1/SC 25/WG 3 developed the equivalent standard ISO/IEC 11801-1:2017/COR 1:2018, with two options: Class I channel (Category 8.1 cable): minimum cable design U/FTP or F/UTP, fully backward compatible and interoperable with Class EA (Category 6A) using 8P8C connectors; Class II channel (Category 8.2 cable): F/FTP or S/FTP minimum, interoperable with Class FA (Category 7A) using TERA or GG45. == Abbreviations for twisted pairs == Annex E, Acronyms for balanced cables, provides a system to specify the exact construction for both unshielded and shielded balanced twisted pair cables. It uses three letters—U for unshielded, S for braided shielding, and F for foil shielding—to form a two-part abbreviation in the form of xx/xTP, where the first part specifies the type of overall cable shielding, and the second part specifies shielding for individual cable elements. Common cable types include U/UTP (unshielded cable); U/FTP (individual pair shielding without the overall screen); F/UTP, S/UTP, or SF/UTP (overall screen without individual shielding); and F/FTP, S/FTP, or SF/FTP (overall screen with individual foil shielding). == 2017 edition == In November 2017, a new edition was released by ISO/IEC JTC 1/SC 25 "Interconnection of information technology equipment" subcommittee. It is a major revision of the standard which has unified several prior standards for commercial, home, and industrial networks, as well as data centers, and defines requirements for generic cabling and distributed building networks. The new series of standards replaces the former 11801 standard and includes six parts: == Versions == ISO/IEC 11801:1995 (Ed. 1) ISO/IEC 11801:2000 (Ed. 1.1) – Edition 1, Amendment 1 ISO/IEC 11801:2002 (Ed. 2) ISO/IEC 11801:2008 (Ed. 2.1) – Edition 2, Amendment 1 ISO/IEC 11801:2010 (Ed. 2.2) – Edition 2, Amendment 2 ISO/IEC 11801-1:2017, -1:2017/Cor 1:2018, -2:2017, -3:2017, -3:2017/Amd 1:2021, -3:2017/Cor 1:2018, -4:2017, -4:2017/Cor 1:2018, -5:2017, -5:2017/Cor 1:2018, -6:2017, -6:2017/Cor 1:2018 (As of September 2023, this set is current.)

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  • Computational heuristic intelligence

    Computational heuristic intelligence

    Computational heuristic intelligence (CHI) refers to specialized programming techniques in computational intelligence (also called artificial intelligence, or AI). These techniques have the express goal of avoiding complexity issues, also called NP-hard problems, by using human-like techniques. They are best summarized as the use of exemplar-based methods (heuristics), rather than rule-based methods (algorithms). Hence the term is distinct from the more conventional computational algorithmic intelligence, or symbolic AI. An example of a CHI technique is the encoding specificity principle of Tulving and Thompson. In general, CHI principles are problem solving techniques used by people, rather than programmed into machines. It is by drawing attention to this key distinction that the use of this term is justified in a field already replete with confusing neologisms. Note that the legal systems of all modern human societies employ both heuristics (generalisations of cases) from individual trial records as well as legislated statutes (rules) as regulatory guides. Another recent approach to the avoidance of complexity issues is to employ feedback control rather than feedforward modeling as a problem-solving paradigm. This approach has been called computational cybernetics, because (a) the term 'computational' is associated with conventional computer programming techniques which represent a strategic, compiled, or feedforward model of the problem, and (b) the term 'cybernetic' is associated with conventional system operation techniques which represent a tactical, interpreted, or feedback model of the problem. Of course, real programs and real problems both contain both feedforward and feedback components. A real example which illustrates this point is that of human cognition, which clearly involves both perceptual (bottom-up, feedback, sensor-oriented) and conceptual (top-down, feedforward, motor-oriented) information flows and hierarchies. The AI engineer must choose between mathematical and cybernetic problem solution and machine design paradigms. This is not a coding (program language) issue, but relates to understanding the relationship between the declarative and procedural programming paradigms. The vast majority of STEM professionals never get the opportunity to design or implement pure cybernetic solutions. When pushed, most responders will dismiss the importance of any difference by saying that all code can be reduced to a mathematical model anyway. Unfortunately, not only is this belief false, it fails most spectacularly in many AI scenarios. Mathematical models are not time agnostic, but by their very nature are pre-computed, i.e. feedforward. Dyer [2012] and Feldman [2004] have independently investigated the simplest of all somatic governance paradigms, namely control of a simple jointed limb by a single flexor muscle. They found that it is impossible to determine forces from limb positions- therefore, the problem cannot have a pre-computed (feedforward) mathematical solution. Instead, a top-down command bias signal changes the threshold feedback level in the sensorimotor loop, e.g. the loop formed by the afferent and efferent nerves, thus changing the so-called ‘equilibrium point’ of the flexor muscle/ elbow joint system. An overview of the arrangement reveals that global postures and limb position are commanded in feedforward terms, using global displacements (common coding), with the forces needed being computed locally by feedback loops. This method of sensorimotor unit governance, which is based upon what Anatol Feldman calls the ‘equilibrium Point’ theory, is formally equivalent to a servomechanism such as a car's ‘cruise control’.

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  • Prix Ars Electronica

    Prix Ars Electronica

    The Prix Ars Electronica is one of the best known and longest running yearly prizes in the field of electronic and interactive art, computer animation, digital culture and music. It has been awarded since 1987 by Ars Electronica (Linz, Austria). In 2005, the Golden Nica, the highest prize, was awarded in six categories: "Computer Animation/Visual Effects," "Digital Musics," "Interactive Art," "Net Vision," "Digital Communities" and the "u19" award for "freestyle computing." Each Golden Nica came with a prize of €10,000, apart from the u19 category, where the prize was €5,000. In each category, there are also Awards of Distinction and Honorary Mentions. The Golden Nica trophy is a replica of the Greek Nike of Samothrace. It is a handmade gold-plated wooden statuette that is approximately 35 cm high with a wingspan of about 20 cm. "Prix Ars Electronica" is a phrase composed of French, Latin and Spanish words, loosely translated as "Electronic Arts Prize." == Golden Nica winners == === Computer animation / film / vfx === The "Computer Graphics" category (1987–1994) was open to different kinds of computer images. The "Computer Animation" (1987–1997) was replaced by the current "Computer Animation/Visual Effects" category in 1998. ==== Computer Graphics ==== 1987 – Figur10 by Brian Reffin Smith, UK 1988 – The Battle by David Sherwin, US 1989 – Gramophone by Tamás Waliczky, HU 1990 – P-411-A by Manfred Mohr, Germany 1991 – Having encountered Eve for the second time, Adam begins to speak by Bill Woodard, US 1992 – RD Texture Buttons by Michael Kass and Andrew Witkin, US 1993 – Founders Series by Michael Tolson, US 1994 – Jellylife / Jellycycle / Jelly Locomotion by Michael Joaquin Grey, US ==== Computer Animation ==== 1987 – Luxo Jr. by John Lasseter, US 1988 – Red's Dream by John Lasseter, US 1989 – Broken Heart by Joan Staveley, US 1990 – Footprint by Mario Sasso and Nicola Sani, IT 1991 – Panspermia by Karl Sims, US 1992 – Liquid Selves / Primordial Dance by Karl Sims, US 1993 – Lakmé by Pascal Roulin, BE 1994 – Jurassic Park by Dennis Muren, Mark Dippé and Steve Williams, US/CA Distinction: Quarxs by Maurice Benayoun, FR Distinction: K.O. Kid by Marc Caro, FR 1995 – God's Little Monkey by David Atherton and Bob Sabiston, US 1996 – Toy Story by John Lasseter, Lee Unkrich and Ralph Eggleston, US 1997 – Dragonheart by Scott Squires, Industrial Light & Magic (ILM), US ==== Computer Animation/Visual Effects ==== 1998 – The Sitter by Liang-Yuan Wang, TW Titanic by Robert Legato and Digital Domain, US 1999 – Bunny by Chris Wedge, US What Dreams May Come by Mass Illusions, POP, Digital Domain, Vincent Ward, Stephen Simon and Barnet Bain, US 2000 – Maly Milos by Jakub Pistecky, CA Maaz by Christian Volckman, FR 2001 – Le Processus by Xavier de l’Hermuzičre and Philippe Grammaticopoulos, FR 2002 – Monsters, Inc. by Andrew Stanton, Lee Unkrich, Pete Docter and David Silverman, US 2003 – Tim Tom by Romain Segaud and Cristel Pougeoise, FR 2004 – Ryan by Chris Landreth, US. Distinction: Parenthèse from Francois Blondeau, Thibault Deloof, Jérémie Droulers, Christophe Stampe, France Distinction: Birthday Boy from Sejong Park, Australia 2005 – Fallen Art by Tomek Baginski, Poland. Distinction: The Incredibles from Pixar Distinction: City Paradise by Gaëlle Denis (UK), Passion Pictures (FR) 2006 – 458nm by Jan Bitzer, Ilija Brunck, Tom Weber, Filmakademie Baden-Württemberg, Germany. Distinction: Kein platz Für Gerold by Daniel Nocke / Studio Film Bilder, Germany Distinction: Negadon, the monster from Mars, by Jun Awazu, Japan 2007 – Codehunters by Ben Hibon, (UK) 2008 – Madame Tutli-Putli by Chris Lavis, Maciek Szczerbowski. (Directors), Jason Walker (Special Visual Effects), National Film Board of Canada 2009 – HA'Aki by Iriz Pääbo, National Film Board of Canada 2010 – Nuit Blanche by Arev Manoukian (Director), Marc-André Gray (Visual Effects Artist), National Film Board of Canada 2011 – Metachaos by Alessandro Bavari (IT) 2012 – Rear Window Loop by Jeff Desom (LU) Distinction: Caldera by Evan Viera/Orchid Animation (US) Distinction: Rise of the Planet of the Apes by Weta Digital (NZ)/Twentieth Century Fox 2013 – Forms by Quayola (IT), Memo Akten (TR) Distinction: Duku Spacemarines by La Mécanique du Plastique (FR) Distinction: Oh Willy… by Emma De Swaef (BE), Marc James Roels (BE) / Beast Animation 2014 – Walking City by Universal Everything (UK) 2015 – Temps Mort by Alex Verhaest (BE)[1] Distinction: Bär by Pascal Floerks (DE) Distinction: The Reflection of Power by Mihai Grecu (RO/HU) === Digital Music === This category is for those making electronic music and sound art through digital means. From 1987 to 1998 the category was known as "Computer music." Two Golden Nicas were awarded in 1987, and none in 1990. There was no Computer Music category in 1991. 1987 – Peter Gabriel and Jean-Claude Risset 1988 – Denis Smalley 1989 – Kaija Saariaho 1990 – None 1991 – Category omitted 1992 – Alejandro Viñao 1993 – Bernard Parmegiani 1994 – Ludger Brümmer Distinction: Jonathan Impett 1995 – Trevor Wishart 1996 – Robert Normandeau 1997 – Matt Heckert 1998 – Peter Bosch and Simone Simons (joint award) 1999 – Come to Daddy by Aphex Twin (Richard D. James) and Chris Cunningham (joint award) Distinction: Birthdays by Ikue Mori (JP) Distinction: Mego (label), Hotel Paral.lel by Christian Fennesz, Seven Tons For Free by Peter Rehberg (a.k.a. Pita) 2000 – 20' to 2000 by Carsten Nicolai Distinction: Minidisc by Gescom Distinction: Outside the Circle of Fire by Chris Watson 2001 – Matrix by Ryoji Ikeda 2002 – Man'yo Wounded 2001 by Yasunao Tone 2003 – Ami Yoshida, Sachiko M and Utah Kawasaki (joint award) 2004 – Banlieue du Vide by Thomas Köner 2005 – TEO! A Sonic Sculpture by Maryanne Amacher 2006 – L'île ré-sonante by Éliane Radigue 2007 – Reverse-Simulation Music by Mashiro Miwa 2008 – Reactable by Sergi Jordà (ES), Martin Kaltenbrunner (AT), Günter Geiger (AT) and Marcos Alonso (ES) 2009 – Speeds of Time versions 1 and 2 by Bill Fontana (US) 2010 – rheo: 5 horizons by Ryoichi Kurokawa (JP) 2011 – Energy Field by Jana Winderen (NO) 2012 – "Crystal Sounds of a Synchrotron" by Jo Thomas (GB) 2013 – frequencies (a) by Nicolas Bernier (CA) Distinction: SjQ++ by SjQ++ (JP) Distinction: Borderlands Granular by Chris Carlson (US) 2015 – Chijikinkutsu by Nelo Akamatsu (JP) Distinction: Drumming is an elastic concept by Josef Klammer (AT) Distinction: Under Way by Douglas Henderson (DE) 2017 – Not Your World Music: Noise In South East Asia by Cedrik Fermont (CD/BE/DE), Dimitri della Faille (BE/CA) Distinction: Gamelan Wizard by Lucas Abela (AU), Wukir Suryadi (ID) und Rully Shabara (ID) Distinction: Corpus Nil by Marco Donnarumma (DE/IT) === Hybrid art === 2007 – Symbiotica 2008 – Pollstream – Nuage Vert by Helen Evans (FR/UK) and Heiko Hansen (FR/DE) HeHe 2009 – Natural History of the Enigma by Eduardo Kac (US) 2010 – Ear on Arm by Stelarc (AU) 2011 – May the Horse Live in me by Art Orienté Objet (FR) 2012 – Bacterial radio by Joe Davis (US) Distinction: Free Universal Construction Kit (F.U.C.K.) by Golan Levin and Shawn Sims 2013 – Cosmopolitan Chicken Project, Koen Vanmechelen (BE) 2015 – Plantas Autofotosintéticas, Gilberto Esparza (MX) 2017 – K-9_topology, Maja Smrekar (SI) === [the next idea] voestalpine Art and Technology Grant === 2009 – Open_Sailing by Open_Sailing Crew led by Cesar Harada. 2010 – Hostage by [Frederik De Wilde]. 2011 – Choke Point Project by P2P Foundation (NL). 2012 – qaul.net – tools for the next revolution by Christoph Wachter & Mathias Jud 2013 – Hyperform by Marcelo Coelho (BR), Skylar Tibbits (US), Natan Linder (IL), Yoav Reaches (IL) Honorary Mentions: GravityLight by Martin Riddiford (GB), Jim Reeves (GB) 2014 – BlindMaps by Markus Schmeiduch, Andrew Spitz and Ruben van der Vleuten 2015 – SOYA C(O)U(L)TURE by XXLab (ID) – Irene Agrivina Widyaningrum, Asa Rahmana, Ratna Djuwita, Eka Jayani Ayuningtias, Atinna Rizqiana === Interactive Art === Prizes in the category of interactive art have been awarded since 1990. This category applies to many categories of works, including installations and performances, characterized by audience participation, virtual reality, multimedia and telecommunication. 1990 – Videoplace installation by Myron Krueger 1991 – Think About the People Now project by Paul Sermon 1992 – Home of the Brain installation by Monika Fleischmann and Wolfgang Strauss 1993 – Simulationsraum-Mosaik mobiler Datenklänge (smdk) installation by Knowbotic Research 1994 – A-Volve environment by Christa Sommerer and Laurent Mignonneau 1995 – the concept of Hypertext, attributed to Tim Berners-Lee 1996 – Global Interior Project installation by Masaki Fujihata 1997 – Music Plays Images X Images Play Music concert by Ryuichi Sakamoto and Toshio Iwai 1998 – World Skin, a Photo Safari in the Land of War installation by Jean-Baptiste Barrière and Maurice Benayoun 1999 – Difference Engine #3 by construct and Lynn Hershman 2000 – Vectorial Elevati

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  • Web engineering

    Web engineering

    The World Wide Web has become a major delivery platform for a variety of complex and sophisticated enterprise applications in several domains. In addition to their inherent multifaceted functionality, these Web applications exhibit complex behaviour and place some unique demands on their usability, performance, security, and ability to grow and evolve. However, a vast majority of these applications continue to be developed in an ad hoc way, contributing to problems of usability, maintainability, quality and reliability. While Web development can benefit from established practices from other related disciplines, it has certain distinguishing characteristics that demand special considerations. In recent years, there have been developments towards addressing these considerations. Web engineering focuses on the methodologies, techniques, and tools that are the foundation of Web application development and which support their design, development, evolution, and evaluation. Web application development has certain characteristics that make it different from traditional software, information systems, or computer application development. Web engineering is multidisciplinary and encompasses contributions from diverse areas: systems analysis and design, software engineering, hypermedia/hypertext engineering, requirements engineering, human-computer interaction, user interface, data engineering, information science, information indexing and retrieval, testing, modelling and simulation, project management, and graphic design and presentation. Web engineering is neither a clone nor a subset of software engineering, although both involve programming and software development. While Web Engineering uses software engineering principles, it encompasses new approaches, methodologies, tools, techniques, and guidelines to meet the unique requirements of Web-based applications. == As a discipline == Proponents of Web engineering supported the establishment of Web engineering as a discipline at an early stage of Web. Major arguments for Web engineering as a new discipline are: Web-based Information Systems (WIS) development process is different and unique. Web engineering is multi-disciplinary; no single discipline (such as software engineering) can provide a complete theory basis, body of knowledge and practices to guide WIS development. Issues of evolution and lifecycle management when compared to more 'traditional' applications. Web-based information systems and applications are pervasive and non-trivial. The prospect of Web as a platform will continue to grow and it is worth being treated specifically. However, it has been controversial, especially for people in other traditional disciplines such as software engineering, to recognize Web engineering as a new field. The issue is how different and independent Web engineering is, compared with other disciplines. Main topics of Web engineering include, but are not limited to, the following areas: === Modeling disciplines === Business Processes for Applications on the Web Process Modelling of Web applications Requirements Engineering for Web applications B2B applications === Design disciplines, tools, and methods === UML and the Web Conceptual Modeling of Web Applications (aka. Web modeling) Prototyping Methods and Tools Web design methods CASE Tools for Web Applications Web Interface Design Data Models for Web Information Systems === Implementation disciplines === Integrated Web Application Development Environments Code Generation for Web Applications Software Factories for/on the Web Web 2.0, AJAX, E4X, ASP.NET, PHP and Other New Developments Web Services Development and Deployment === Testing disciplines === Testing and Evaluation of Web systems and Applications. Testing Automation, Methods, and Tools. === Applications categories disciplines === Semantic Web applications Document centric Web sites Transactional Web applications Interactive Web applications Workflow-based Web applications Collaborative Web applications Portal-oriented Web applications Ubiquitous and Mobile Web Applications Device Independent Web Delivery Localization and Internationalization of Web Applications Personalization of Web Applications == Attributes == === Web quality === Web Metrics, Cost Estimation, and Measurement Personalisation and Adaptation of Web applications Web Quality Usability of Web Applications Web accessibility Performance of Web-based applications === Content-related === Web Content Management Content Management System (CMS) Multimedia Authoring Tools and Software Authoring of adaptive hypermedia == Education == Master of Science: Web Engineering as a branch of study within the MSc program Web Sciences at the Johannes Kepler University Linz, Austria Diploma in Web Engineering: Web Engineering as a study program at the International Webmasters College (iWMC), Germany

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